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3.2.4 Estimation of Lithographic Overlay in Integrated Circuits Using Scanning Capacitance Microscopy

William F. Guthrie

Statistical Engineering Division, ITL

Santos Mayo,
Joseph Kopanski

Semiconductor Electronics Division, EEEL

Misalignment of circuitry layers in IC's results in low yields and high costs. Thus, as feature sizes decrease, the ability to determine the amount of misalignment (called overlay) is becoming increasingly important. Overlay is typically measured using high-volume optical instruments. These instruments, however, are susceptible to systematic errors called tool-induced shifts (TIS). As a result, development of high-accuracy test methods for calibration of optical measurements is a priority for the semiconductor industry.

One promising test method is scanning capacitance microscopy (SCM). With this method, the probe of an atomic force microscope (AFM) is moved across a test structure on a wafer of IC's and changes in capacitance are recorded. Capacitance changes induced by different parts of the test structure can be used to estimate their locations. Two test structures are shown in the adjacent figure (part A). For these structures the alignment of photoresist for a new layer of circuitry and lines from a previous layer are to be compared. The line in one structure is ``floating'' while the other is grounded. The floating line is simpler to make, but the grounded line gives a stronger signal.

SCM data from an electrostatic field simulator is shown in part B of the figure. Use of simulated data allows testing of the measurement system before fabrication of expensive samples for AFM use. The peaks near x=7.25and x=22.75 correspond to the lines. The asymmetric peaks beside the line-induced peaks mark the edges of the photoresist.

Line locations are found by fitting a rational function in (x-ps)2, where ps is the point of symmetry, to the line-induced peak data (part C). The points on either side of a first approximation to ps are indicated by different symbols. Part D of the figure shows the peak data plotted versus the predictor variable based on the final estimate of ps. The fitted function shows the quality of the fit in global terms. The locations of the photoresist openings are found by averaging the x values associated the minimum capactiance near each peak. Careful probe placement is key to the success of this technique.

The difference in line and photoresist locations gives overlay. Several examples are shown below. There is modest bias in the result with non-zero overlay for the grounded line and large bias for the floating line. Future work will focus on eliminating this bias, which stems from asymmetry in the data caused by overlap of photoresist and embedded lines.

  Floating Line Grounded Line
True Overlay: $\ 0.0000 \ \mu$m $ 0.0021 \pm 0.0031$ $-0.0010 \pm 0.0030$
True Overlay: $-0.0500 \ \mu$m $-0.0040 \pm 0.0030$ $-0.0438 \pm 0.0036$


Figure 7: Test structures and data for measurement of lithographic overlay using scanning capacitance microscopy. A) shows the two test structures (floating and grounded lines) and the AFM probe. B) shows simulated SCM data from the two structures. C) shows a subset of the data used for estimation of peak location for the floating line. D) shows the data from C) ``folded'' around the peak location (the point of symmetry) and the fitted rational function.

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Date created: 7/20/2001
Last updated: 7/20/2001
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